On-line fuzzy verification of real time systems and its uncertainty analysis. [+INFO]

Industrial environments demand specification languages expressive enough to model and verify complex scenarios. Such specification requirements demand the flexibility to manage manufacturing event correlations, performance constraints and timing restrictions such as holdups and delays. Under these guidelines, this thesis presents the functional specification language FTL-CFree, a real runtime language that extends temporal logics with fuzzy semantics. Moreover, this language enriches temporal logic expressiveness with random access to past values and fuzzy evolutionary semantics. Given a specific input trace, this interpretation not only aims to measure the degree of truth of an assertion, but also sets how it will evolve in the future, if new trace suffixes are provided. As is usually the case in runtime verification, the language provides for oracle generation, and so, an automatic observable specification can be obtained from high-level requirements. As a result, a real-time monitor is synthesized, and its application in failure detection and quality management systems is an increasingly common practice. Whereas runtime verification provides an online insight into system behavior, the ability to analyze the stationary response during nominal operation is a must for the engineering community. The evaluation outcome of a specification requirement is undoubtedly disturbed by process variability and, therefore, characterizing its statistical properties is an important concern. The semantics of FTL-CFree converts an input scenario into a fuzzy evaluation and, as a result, this can be analyzed by means of random variable algebra. Here, it is possible to demonstrate that an FTL-CFree formula follows a custom probability distribution and, as a result, it can be confirmed that the probability theory is capable of handling randomness in fuzzy measures. Based on this fact, several features can be used, for example, a new methodology to tune the parameters of formulae relating to membership functions and temporal bounds. These parameters can be resolved in an unsupervised manner if certain probabilistic requirements are provided. All aforementioned contributions, the FTL-CFree language, the real-time monitor, the statistical interpretation, and the formula parameterization method are available in the runtime platform PROMIND.

Author:  Joaquin Pérez Márquez.
Advisor:  Jaime Jiménez Verde.
Defence date:  March 18th of 2015.
Qualification:  Outstanding cum laude.

Modulation Techniques for three-level multiphase NPC converters and efficient control of wave energy capture devices. [+INFO]

Over the past decade, the sector involved in the industrialization and in the research of the energy that come from the sea was profited from a great support from the industry and from public and private entities, due to the promising growth that is expected in the sector. This support is mostly focused in two sorts of energy exploitation: the energy extracted from the waves and the energy extracted from ocean currents.

Such techniques are still in their early stages of technological maturity and have not reached commercialization. Some of the barriers that must be overcome to achieve industrialization are the following ones:

• Regarding economic terms, one of the main barriers is the cost associated with the maintenance and repair of the marine energy converters. This problem arises largely due to difficulties in accessing the medium (high sea), and the bad weather that location.
  
• Regarding the extracted power, the energy density captured from the waves and from the ocean currents is much higher than that of the sun or wind, resulting in the need of processing proportionately higher energy levels. This implies redesigning the architecture of the powertrain of the marine energy converter. Also, due to the fluctuating nature of the waves and ocean currents, the power produced by these devices is also irregular. It is necessary to mitigate its fluctuations to allow the injection into electrical grid of the output power.
  
  

These drawbacks require the investment of great efforts in the stages of design and control of the power extraction system (or Power Take-off system, PTO). The PTO system of a marine energy converter (wave or ocean current converter) consists, in general terms, of an electric generator, in a power converter and in an energy-storage system.

Considering the previous technological barriers, in relation to the processing of higher energy levels and repair and maintenance labours, including a multiphase generator in the PTO system instead of the classic three-phase generator is presented as a good alternative. The latter is based on the fact that a multiphase system is able to operate as long as it has at least three operational phases. Consequently, the use of multilevel converters (rather than having several parallel converters) and multiphase converters might be a good solution both in terms of processing power and the quality of the power generated. However, in the literature there are relatively few studies around multilevel and multiphase technology. The complexity of the control and modulation algorithms of such converters increases exponentially just as the number of phases, so that their use is, beforehand, complex.

One of the objectives of this thesis is to address this deficiency. Two modulation strategies have been proposed for three-level multiphase NPC converter. Considering the proposed first strategy the results are similar to those achieved using the SPWM (Sinusoidal Pulse Width Modulation) and NTV (Nearest Three Vector) modulations in three-phase converters. However, it differs from the latter in its simplicity and easy extension to m-phase converters as well as in its low computational load. The second modulation algorithm has a higher complexity than the previous one, but it is still intuitive and easily extensible to m-phase converters. Likewise, it is able to remove completely the harmful low frequency voltage oscillations that appear in the neutral point and keep in balance, under all operating conditions, the voltage distribution of the capacitors that form the DC bus. Furthermore, the quality of the generated signal has a low WTHD (Weighted Total Harmonic Distortion). All the proposed modulation strategies have been validated by simulation in Matlab/Simulink platform and experimentally in a prototype developed by the Energy and Environmental division of Tecnalia Research & Innovation.

On the other hand, to solve the fluctuations of the power extracted by wave and ocean current converters, as stated, the PTO system usually includes an energy-storage system in order to remove, or reduce, the generated signal fluctuations while the maximum power is extracted. Such storage can be hydraulic, mechanical or electrical. Attending to the storage type, the control characteristics are different. In this context, this thesis presents, as a second contribution, several control alternatives for a floating OWC (Oscillating Water Column) wave converter. The OWC device has been selected as one of the most technologically mature between the different types of wave energy converters. The control alternatives proposed in this thesis are focused on attaining the maximum efficiency of the air-turbine (Wells turbine) that the OWC device incorporates. These alternatives are based on following the optimum turbine speed in order to achieve the maximum power extraction. Also, other device options of energy-storage are proposed, such as supercapacitors and a flywheel. Thanks to the combination of several proposed control strategies an improvement in the efficiency of these systems is achieved while the generated power fluctuations are greatly reduced, providing the injection to the electrical grid. As in the case of the multilevel and multiphase modulation strategies, these control alternatives for an OWC wave energy converter are validated by simulation and experimentally on a scale prototype on a wave testbench developed by HMRC (Hydraulics and Maritime Research Centre) at the University of Cork, Ireland.

Author:  Iraide López Ropero.
Advisors:  Jon Andreu y Salvador Ceballos.
Defence date:  March 6th of 2015.
Qualification:  Outstanding cum laude.

Human interaction monitoring using Bluetooth technology. [+INFO]

The characterization of human behavior based on the analysis of their activity requires tools that assure the reliability of the collected data. In the last few years, and due to the electronics evolution and the success of personal communication devices (smartphones, tablets, etc.), data collection initiatives on human interaction based on such devices have proliferated. These initiatives make use of the communication capabilities of personal devices to estimate the proximity of people who carry them. However, these devices have not been designed for this purpose, and consequently, they suffer from a set of limitations that, if they are not properly addressed, questions the quality of the collected data and their reliability for the characterization of human behavior.

The first part of the thesis analyzes the limitations of previous proximity data collection initiatives using personal communication devices, and presents a Bluetooth-based ad hoc system that considers them all, and implements a set of mechanisms to solve them when possible, or at least, minimize their impact. Its operation is described and its performance in a real deployment is presented, with a resultant high reliability database at the disposal of the public research community. The results of the processing stage show important differences with the conclusions of previous initiatives. In order to fully understand human behavior, it is necessary to consider the conditions, the context where they carry out their daily activities. The locations where people stay at every moment are a very important part of the context.

The second part of the thesis is focused on the development of a tool that provides localization information using the data provided by the system developed in the first part of the thesis: the information related to human proximity and their mobility. This tool takes the form of a family of localization algorithms that is validated through a set of experiments in different scenarios with multiple topologies. Finally, the applicability of this tool is shown on a sample of the real database obtained from the _rst part of the thesis, where the proximity and mobility information from the people in the experiment becomes information about their localization.

Author:  José María Cabero López.
Advisor:  José Luis Martín.
Defence date:  January 29th of 2015.
Qualification:  Outstanding cum laude.

Frame control for high availability by redundancy in industrial automation networks over Ethernet with PRP and HSR. [+INFO]

Communication networks, and Ethernet networks in particular, have been expanded into other fields, besides the office informatics; one of their latest conquests has been industrial automation networks in substations. The recently published IEC 61850-90-4 establishes engineering lines for communication networks and systems in power utility automation. This standard proposes Ethernet with PRP and HSR protocols, defined in the IEC 62439-3, as a global standard to use in the Bus Station and Process Bus in substations. These protocols are characterized by a zero recovery time, which means that, faced with a network failure, communication is not stopped and there is no frame loss. They provide the hot-plugging feature, which allows connecting and disconnecting devices without having to stop the operation process of the network and other devices.

Their operation is based on sending duplicated frames through different paths, so that, if due to any reason one of the frames does not arrive, the other one continues being received. This increased availability has a drawback, among others, an increase of the management and processing work of the frames; in particular, a new task appears: the elimination of duplicated frames. In addition to the duplicated frames introduced by the protocols themselves, a new type of frame also appears: circulating frames, which comes up when a frame makes a complete lap in a loop of the network and arrives again over the same port to the node. The involved standards do not specify how to discard duplicates and circulating frames, but set strict time and operating conditions to be complied by the discarding method chosen.

In this thesis, these requirements are analyzed and studied, and particularly, parameters such as latency, throughput or reliability. Discard methods, which conform the requirements, are proposed in order to obtain a correct application of PRP and HSR in substations or power utility automation networks in general. The developed methods could be integrated in devices needed in this type of high availability networks. The hard conditions imposed to these protocols, so as to be used in substations, make these developments usable for other applications in which the availability parameters are as hard or more relaxed.

Author:  José Angel Araujo Parra.
Advisor:  Jesús Lázaro.
Defence date:  January 16th of 2015.
Qualification:  Outstanding cum laude.

Estimating the Resilience Against Single Event Upsets in Applications Implemented on SRAM based FPGAs. [+INFO]

Ongoing improvements in the semiconductor manufacturing processes are the basis of very complex and powerful electronic systems. This movement together with a rapid development in the technology of reconfigurable devices enabled Field Programmable Gate Arrays to grow away from the application as pure glue logic towards becoming an attractive implementation platform for complete electronic applications.

Different attributes of FPGAs, such as a low non-recurring engineering cost, reconfigurability and high data throughput, make these devices an attractive technology for harsh environments. Because of their reconfigurable nature SRAM based FPGAs are especially susceptible to external faults caused by Single Event Upsets. FPGA manufacturers address this issue with specialized FPGA families, but these are typically very expensive and one to two generations behind their latest, most powerful architecture. A consequence of this is a strong interest in techniques, which enable the usage of unprotected FPGAs in critical applications.

This thesis addresses the utilization of Custom Off The Shelf SRAM based FPGAs in environments with an elevated particle ux. The main focus lies on the development and application of suitable test methods for obtaining the exact SEU resilience of a given design. As a first step an external and non-invasive fault injection method is developed addressing the sparsity of fault injectors with low hardware overhead in the currently available state of the art. In a second step a performance improved fault injection method is developed, which includes a universal approach for handling issues related to fault injection using internal configuration ports.

The proposed high performance fault injection platform is both mathematically characterized and evaluated in practice with special focus on different parameters that have a direct influence on the speed of the fault injection and also the accuracy of the obtained results. Finally, the proposed fault injection methods are used to investigate attributes important for fault tolerant applications. Detailed evaluations of the aspects of TMR granularity, SEU resiliences of common application circuits and the impact of adequate validation on the fault injection results are presented.

Author:  Uli Kretzschmar.
Advisor:  Armando Astarloa.
Defence date:  July 24th of 2014.
Qualification:  Outstanding cum laude.

Design and Development Procedure of HTS Superconducting Solenoids and their Application for Microwave Sources for Fusion and Other Power Devices. [+INFO]

The HTS (High critical Temperature Superconductors) materials together with cryocoolers (cryogenic refrigerators) permit to afford a large number of potential applications. Among them, power devices applications stood out, in particular microwave sources for fusion. This thesis is focused in cryocooled 1G HTS solenoids, but this election is argued to be flexible enough for the most remarkable applications. HTS materials where discovered more than 25 years ago. It was patented its potential from the beginning, but the difficulties to obtain a practical wire were underestimated. Nowadays, one can find commercially available wire, but at high cost and without enough testing in large scale applications in the long term. There are some prototypes and incipient commercial applications, but still reliable manufacturing procedures and design tools are not well established. The other pillar in which supports this development is the availability of small size cryocoolers. They are reliable commercial finished products developed for other applications (as vacuum pumps). However, they have low efficiency (compared to the ideal Carnot refrigerator) and require a carefully cryostat design, as the available cooling power is really small. Which was achieved in this thesis is to depth in all the aspects required for the design, manufacturing and testing of HTS coils refrigerated by means of a cryocooler. The intention of the author was easing and speeding up the development of such devices and at the end to contribute to the development of practical large scale HTS applications. The orientation has been not only theoretical, but also practical. A cryogen-free cryostat has been setup to achieve double pancake coils cooling by means of a cryocooler. Several coils have been constructed up to large scale, and a representative section of a large scale magnet has been constructed with successful results.

Author:  Santiago Sanz Castillo.
Advisors:  José Luis Martín and Luis Garcia-Tabarés Rodriguez.
Defence date:  October 3rd of 2013.
Qualification:  Outstanding cum laude.

Optimizing Power Extraction in Small Wind Turbines. [+INFO]

Small Wind Turbines with rated power below 100 kW can be found in multiple applications today. In spite of the forecasts, global Small Wind Turbine industry has not reached the development state of the conventional wind industry. A mayor factor which keeps this industry from further growth is the low efficiency of Small Wind Turbines. During the last years important efforts towards improvements in efficiency have been done, specially with vertical axis wind turbines. Another field for improvement in Small Wind Turbines is their control strategies. Particular characteristics of small wind turbines make control and optimal maximum power point tracking difficult. In this context, this thesis presents a new maximum power point tracking algorithm. This new algorithm is characterized by its ability to adapt to changes in the wind turbine, improving its energy efficiency. Likewise, a new inverter control strategy with fast dynamic response and insensitive to grid frequency variation is presented. Furthermore, a Small Wind Turbine simulation platform and an experimental test bench have been developed in this thesis to validate the designed control algorithms. In order to improve the simulation of Small Wind Turbine power conversion stages, two new simulation techniques have been proposed within the thesis. The results have been used to validate the most important features of the designed control algorithms.

Author:  Iñigo Kortabarria Iparragirre.
Advisors:  José Luis Martín and Jon Andreu.
Defence date:  June 21st of 2013.
Qualification:  Outstanding cum laude.

Contributions to hierarchical control of electrical microgrids. [+INFO]

Microgrids can be defined as small distributed system that can operate both connected or disconnected from the main grid. Thanks to this property, users that are connected to microgrids can obtain a high quality energy supply. Moreover, a cleaner and more reliable electric generation can be achieved if ecological and economic aspects are considered. However, the presence of microgrids is still limited due to, among other factors, the absence of standards for these kind of systems. At the beginning of this thesis, a summary of the main aspects of the distributed generation will be presented. In this manner, the most typical power converters used on distributed generation, control basics and the main modulation and commutation techniques will be presented. Then, fundamentals of the electrical microgrids will be described such as protections, topologies and control systems. This last issue is especially interesting since a microgrid involves a great amount of tasks that can be dealt in different manners. In this sense, the most common control will be described, the hierarchical control, analyzing its two operation modes: centralized and decentralized. Among the different control loops involved, the droop control, located at the first level of the control, can be highlighted. This control guarantees the basic operation of the microgrid, taking care of the load sharing and frequency and voltage regulation. New solutions for the control of microgrids will be reported. In this sense, a new design of the droop control will be provided that ensures a good stability of a microgrid in its whole range of load. In the same manner, a linear model that considers both electrical and control schemes of a microgrid will be detailed. This model is the basis of the design of the droop control and can be adapted to different microgrid features. Thanks to this design, a good performance of the microgrid is ensured that is validated by means of experimental tests. Finally, this thesis will provide new solutions for the secondary control of microgrids. This control level comprehends two main tasks: voltage and frequency restoration and synchronization with the main grid. An innovative restoration control that considers the different dynamics of the DGs will be provided. Moreover, this control will be properly designed in order to ensure a voltage and frequency restoration while maintaining a good power quality on the microgrid. Furthermore, this control will be based on low-bandwidth communications that provide an economical and reliable solution. This thesis will consider the two operation modes of the microgrid presenting a new synchronization algorithm. This algorithm will be also based on the same low-bandwidth communications used for the restoration control. This algorithm will guarantee a fast and smooth synchronization in order to ensure a good connection with the main grid.

Author:  Estefania Planas Fullaondo.
Advisors:  José Luis Martín and Jon Andreu.
Defence date:  March 1st of 2013.
Qualification:  Outstanding cum laude.

Methodology to Evaluate Offshore Wind Power Plant Electric Topologies. [+INFO]

The development of offshore wind power plants (OWPPs) can last between seven and ten years, depending on the scale of the plant and on the situation of the supply chain involved. Project stages are usually overlapping and iterations implicating different teams are sometimes necessary to find good solutions. The approaches for the cost-benefit analyses necessary to support the decisions that have to be taken along the project can differ significantly. These design teams have the challenge of providing a technically and economically feasible solution to the subsystem they are designing, bearing in mind the contracts to be signed afterwards with their suppliers. And they should do it without losing the overall perspective of the OWPP and respecting the conditions fixed in the contracts, because changes introduced afterwards usually lead to significant increases in the costs. On the other hand, these techno-economic analyses are also interesting in relation to engineering research. A researcher focused on a technical improvement for a certain subsystem of the OWPP should counterbalance its technical or economical benefit with the increase in cost necessary to include that innovation in the project. And this analysis should be done maintaining the overall perspective, because partial approaches can overestimate the benefits derived from technical improvements, and besides, precious time can be lost considering technical alternatives that are not realistic due to economic, logistic or maintenance determinants. However, to fulfil a realistic cost-benefit analysis of an offshore windfarm is a real challenge. The difficulties come from the technical complexity of the asset, from the correlation among technical, economical and environmental variables, and from the lack of data due to the incipient stage of the technology. Ideally, these assessments should be developed using a methodology which has a scope as wide as possible, which has a simple formulation that enables the evaluation of a sufficient number of scenarios, and which is opened to the consideration of new topologies proposed by the research community. In this context, this thesis provides a new methodology to evaluate techno-economically offshore wind power plant electric topologies. The proposal is aimed at engineering researchers and project planning engineers. The methodology presented is based on the analysis of three related issues: the already commissioned offshore wind farms (OWFs), the medium-term technological trends and the previous evaluation approaches published during the last decade. The formulation of the methodology is presented in detail, the relevant sources of information are cited, the scope is clarified and, finally, the methodology is applied to a case study.

Author:  Ander Madariaga Álvarez.
Advisors:  José Luis Martín and Inmaculada Zamora.
Defence date:  January 30th of 2013.
Qualification:  Outstanding cum laude.

Go to islanding of microgrids: study of detection and a proposition of a control architecture based on wireless communications. [+INFO]

Nowadays, the current energetic scenario, mainly based on centralised energy production and concentrated in big generation plants, is undergoing a progressive evolution towards a decentralised model, known as “distributed generation" (DG), composed of many production centres that make almost exclusive use of low-power renewable-energy sources. In this frame, electrical Microgrids (MG) are DG systems that allow “islanding”: the possibility of disconnection from the main grid, without interrupting generation in the microgrid. Switching correctly into islanding requires developing novel control and management systems, in order to provide some level of intelligence to the microgrids. Consequently, this thesis proposes a solution based on a hierarchical management system for microgrids, which includes a Microgrid Central Controller (CCMG) in the top level of the hierarchy, and several load controllers and micro-source controllers. All those controllers, simple and low cost, are equipped with SimpliciTI (a version of ZigBee) protocol based wireless communications. In addition, some passive algorithms to detect islanding are analyzed, in order to study their limitations, and to be compared with the active algorithms. The experimental results demonstrate, from the measured electrical parameters and from the data transmission speed, that the proposed MG controllers work properly.

Author:  Álvaro Llaría Leal.
Advisors:  Jaime Jiménez and Octavian Curea.
Defence date:  September 14th of 2012.
Qualification:  Outstanding cum laude.

Study on Full Direct Current Offshore Wind Farm. [+INFO]

Wind power has become an important player in the power industry and an important factor in new employment generation. There is a continuous development of new wind turbines adapted to offshore wind farms. There is a clear tendency towards manufacturing higher and higher power wind turbines, specially in the design of wind turbines for offshore wind farms. Predictions by the EWEA estimate that onshore wind power will stagnate in the next years while offshore wind power will be a booming industry due to higher profitability and future lower initial investment costs. This cost reduction should come from improvement in technology, manufacturing processes, logistics, operation and maintenance techniques.

Despite the promise of higher returns and cost reductions, offshore wind power requires a higher initial investment and important research and development is required to bring costs down. Power transmission is an important factor in the increase of cost of offshore wind farms. HVDC transmission is the only alternative when the distance from the wind farm to shore is beyond 50-80 km, but the converter station costs are very high. Power losses in the distribution and transmission lines have become a concern for wind farm owners and a reduction of a few tenths of a percentage point becomes a major source of revenue and a significant increase in the profitability of the wind farms.

Power transformers are usually one of the bulkiest and most expensive components in power converters and they introduce a power loss of around 1 % in the wind turbines and the HVDC converters. Suitable power transformers are seldom available as standard components and they must be specified and designed during the converter design process. There is a significant increase in the interest of high frequency transformers and DC grids in distribution systems. The opportunities for size, cost and loss reduction with the introduction of high frequency in wind turbines are clear but it is still technologically very challenging to build this type of transformer in the MW range.

Another potential technology for the improvement of power distribution efficiency is the use of DC current instead of AC current within the wind farm inner grids. Lower logistic demand is another effect of DC grids, as lower section cables are needed. High power offshore power generation farms may contribute significantly to frequency and voltage control of the grid if HVDC VSC systems are used. New technologies must be developed in the following fields: Connection between high voltage static submarine cables and floating platforms or vessels; HVDC system cost reduction; cable installation at sea bed depths beyond 1000 m; direct drive of Very High Voltage generators from the DC bus in HVDC VSC systems; low power converters fed from high or medium voltage DC lines.

This thesis aims to introduce high frequency power transformers in the power stage of wind turbines to reduce the size, power loss and cost of the power stage.

This thesis presents a fully DC integrated system for the elimination of powerstage redundancies and an overall reduction of power loss and cost of the windfarm system. The document describes of a SWHFR DC/C converter using high frequency transformer for direct connection to DC lines. The document explains the use of the leakage inductance of the transformer as an inherent element of the converter to shape the current waveforms. Interleaved operation of series connected SWHFR is introduced to achieve low output current and voltage ripple. The SWHFR concept can reduce the power loss in the cabling and in the VSC converter, simplifying the cooling system. The transformer loss can be reduced by an order of magnitude. The transformer size is also reduced by an order of magnitude.

Last, the thesis presents the operation of a controlled three phase rectifier fed from a square wave three phase inverter through a transformer (CSWHFR). The effect of the transformer leakage inductance and the resulting operating modes have been described in detail, as well as the operation in continuous and discontinuous mode. A combination of SWHFR and CSWHFR can be used to obtain very efficient DC/DC conversion for connection to medium and high voltage lines. While most of the power is delivered through very efficient diode rectifiers, input DC bus voltage control can be obtained by means of a low voltage rating CSWHFR converter.

Author:  Iñigo Martínez de Alegría Mancisidor.
Advisors:  José Luis Martín and Haritza Camblong.
Defence date:  June 28th of 2012.
Qualification:  Outstanding cum laude.

Exploiting the features of the new generation FPGAs to improve control of the power matrix converter and to perform real-time simulations [+INFO]

The characteristics and resources of reconfigurable FPGA devices have been developed significantly in recent years. Thus, today they can be found in many application environments. In power converter applications, however, despite of the advances, the FPGAs are not yet widely used, and they are typically only used to perform secondary tasks.

Power converters are circuits that perform energy conversion in a controlled manner and, today, are used in many fields, for example, in motor drives, in electric vehicles, in elevators, in wind turbines, in energy storage systems, etc. These areas are very important in society, and it is necessary to develop and improve the characteristics of power converters. The matrix converter stands out among power converters, mainly, because it performs direct AC/AC conversion, it has no significant reactive elements (capacitors), it can operate in high and low pressure environments and at high temperatures, it presents bidirectional power flow, it is possible to achieve sinusoidal currents in the grid and sinusoidal voltages at the load and it is compact and modular. However, the MC still presents some challenges, for example, the control and modulation techniques of the MC are complex and have high computational load, it is necessary to work at high modulation and switching frequencies and the protection the MC is complex.

Regarding the development and improvement of power converters, the devices that are used to control these converters play an important role. Traditionally, DSPs (Digital Signal Processors) have been widely used to implement the control algorithms of the power converters and, in particular, of the MC. Meanwhile, FPGAs have been used only as auxiliary devices of the DSPs (typically to perform functions associated with commutation tasks), not making full use of their potential.

However, with today’s development of the FPGAs, they can be an appropriate solution that responds efficiently to the needs of the MC. In order to test the potential of new generation FPGAs and to demonstrate that they can be the control devices for the MC, in this thesis, the implementation of the control of the MC has been tackled from a different and innovative point of view using an FPGA instead of the conventional DSP aproach (there is no references that has been made previously). This system integrates control and modulation functions of the MC within a single circuit implemented by means of hardware blocks (using VHDL), as well as the protection functions, with the aim of increasing the robustness of the converter. In that way, it has been shown that FPGAs are able to implement the most demanding control functions of the MCs, and to respond to the speed requirements. Moreover, the FPGAs offer new opportunities to improve the characteristics of the MCs, for example, dynamic reconfiguration capability.

Modern power systems and their controls are becoming more complex, and the MC is a significant example. Therefore, the development of these systems is complex and long process. However, in order to reduce the time to market, it is necessary to shorten that process. To obtain that objective, simulation is an indispensable tool. However, the simulation of models containing the MC and its control is complex and requires of many resources and time. Therefore, tools to speed up those simulations and to simplify the debugging of control algorithms are needed. In that sense, there are some real time simulation modes: SIL (Software In the Loop), HIL (Hardware In the Loop) and RCP (Rapid Control Prototyping). With these modes, it is possible to speed up and simplify the development and debugging processes of the MC and, in general, of other power systems. To implement these simulation modes it is necessary to use powerful simulators. In this case, RT-Lab eMEGAsim simulator has been used, which is composed of a PC cluster and an FPGA. Using the RT-Lab, some real-time platforms have been implemented, which are valid to accelerate and simplify the design and validation process of the MC and its control. The model that simulates the power and control stages of the MC system in real time has been implemented. Thus, compared to traditional simulations, the executions of simulations are speeded up. A rapid prototyping platform for MC has been performed, in which the control and modulation algorithms of the MC have been tested, in real time and in real conditions (in a 7.5 kW MC prototype).

In the implementation of the real-time simulation platforms, the FPGA of the RT-Lab has performed some relevant tasks in the control of the MC. With the utilization of the FPGA has achieved, among other things, high resolution models of the MC and RL load, and the interaction with the real MC prototype.

Author:  Enekoitz Ormaetxea Gardoqui.
Advisors:  Jon Andreu Larrañaga and Unai Bidarte Peraita.
Defence date:  December 23th of 2011.
Qualification:  Outstanding cum laude.

New solutions for the design process and the fault tolerance for power matrix converter [+INFO]

Power converters can be found in a wide range of applications, such as wind turbines, industrial machine drives, electric and hybrid vehicles, ships and submarines, etc. Power converters are used in energy conversion systems, and their objective is to transform the electric energy in a controlled manner. From the different power converter topologies available, the Matrix Converter (MC) can be highlighted because of the features it presents.

The MC performs direct AC/AC power conversion, and it has no significant reactive elements. Moreover, it can operate in all four quadrants, and currents and voltages with low harmonic distortion can be obtained at the inputs and outputs of the converter. In addition, unity power factor can be achieved at the converter input for any type of load. Finally, it can be said that the MC is very efficient. Taking into account the aforementioned features, MC technology could be very useful for a great number of applications. However, this power converter is not widely used yet, mainly because there is an absence of natural bidirectional switches, the architecture and the control of this converter is very complex, and its robustness is low.

At the beginning of this thesis, the fundamentals of the MC will be presented. After that, the wide range of modulation algorithms that can be found in the literature will be taken into account, and three remarkable modulation techniques will be explained: the Alesina and Venturini technique, the Space Vector Modulation (SVM) technique and the Generalized Scalar Pulse Width Modulation technique.

On the other hand, perturbations that can occur at the input side of the converter will be considered. In that sense, the state of the art of the most relevant solutions to compensate the effects of the aforementioned perturbations will be presented. Taking into account the synchronization needs of the aforementioned compensation techniques, the more convenient solutions to synchronize the MC with the power grid will be determined.

Later on, novel solutions to improve the design process of the MC will be proposed. On the one hand, it must be borne in mind that the simulation of models containing a MC is complex, and the simulation times required in order to perform the simulation of such models is extremely high. In that sense, a novel simulation method called SSMA (Switching State Matrix Averaging) that solves these problems will be presented and validated in this thesis. Moreover, real time simulation of a MC will be performed in a PC cluster, using the proposed SSMA simulation method. In that way, it will be possible to simulate very long transients in a reasonable time frame. Besides, a Rapid Control Prototyping (RCP) platform useful to accelerate the design process of the converter and to debbug its control algorithms will be presented.

Finally, the low robustness of the MC will be also considered in this thesis. The protection strategies of the MC are not capable of protecting the converter in 100 % of the cases. Therefore, in some situations, failures can occur in the elements that constitute the MC. If a failure occurs, it is necessary to use a fault tolerant strategy when the continuous operation of the system must be guaranteed. In that sense, the state of the art of the fault tolerant strategies for MCs will be presented, and the behaviour of a MC when open switch faults occur in its switches will be studied. After that, an strategy capable of identifying faulty MCs switches in open circuit will be presented, and new fault tolerant modulation strategies that improve the fault tolerance of the MC in the presence of open switch faults will be proposed. These techniques will be validated by simulation and by experimental results.

Author:  Eider Robles Sestafe.
Advisors:  José Luis Martín González and Josep Pou Félix.
Defence date:  June 23th of 2010.
Qualification:  Outstanding cum laude.

Grid connection and control of multipole synchronous wind turbines. [+INFO]

Social, economic and environmental concerns request higher efficiency and more sustainable electrical power systems. Wind power is considered as the most promising renewable source and is increasingly widespread worldwide. This has implied two facts: the incredible growth in turbine size and the high wind power integration. The concept of the wind turbine has evolved from being a passive and minority element to become an important part of the grid. Modern wind turbines must contribute to power system stability and are required to take over control tasks that were traditionally focused on conventional power plants. New turbine topologies face the need of operating at very high power rates overcoming the current electrical and structural limits. In addition, the fulfillment of new grid codes requires topologies integrating more power electronics and advanced controls.

In this thesis, the direct-drive permanent magnet synchronous generator with full power converter has been found to be the most promising configuration in order to fulfill the above mentioned requirements. An outer rotor generator has been envisaged with the aim of obtaining a lighter mechanical structure. On the other hand, taking into account the current limitations of the power semiconductors, multilevel converters have been considered, since they offer, among others, the great advantage of working at high voltage, and thus, at high power.

From the standpoint of power control, it is important to ensure that the system is as immune as possible to external disturbances, such as wind speed variations. For that purpose, feedforward controls have been implemented in order to counteract these disturbances before they affect the system.

Finally, a very important issue for the proper operation of any grid-connected power electronic system is the detection of the grid voltage positive sequence. This information is essential for the active and reactive power injection, and critical under unbalanced and distorted grid conditions, especially under the new regulations. The main objective of this thesis and, where most of the work has been concentrated, has been to design robust methods to detect the positive sequence of the grid voltage. Lately, there have been many contributions on this subject. Nevertheless, new grid codes imply the operation of the wind turbines under large disturbances and the positive sequence detectors have to be fast and accurate in the presence of harmonics, voltage dips, phase jumps and frequency variations simultaneously.

Author:  Eider Robles Sestafe.
Advisors:  José Luis Martín González and Josep Pou Félix.
Defence date:  June 23th of 2010.
Qualification:  Outstanding cum laude.

Improvement of the Performance and Protections of a Direct AC/AC Power Converter with Matrix Topology [+INFO]

Nowadays, power electronics is playing a very important role in many energy conversion processes. Thanks to power electronics converters, the characteristics of the electric energy can be modified. In this context, AC/AC conversion is specially relevant because it is necessary in many traction and generation applications. There is a wide variety of converters for AC/AC conversion (cycloconverter, back-to-back converter, multilevel converter, etc.) among which the Matrix Converter (MC) presents very differentiated characteristics.

The MC achieves direct conversion of AC to AC without reactive elements and with a very modular design and small size. Furthermore, the flux of power is bidirectional and the power delivered is of high quality. In spite of all this, the MC is not yet a mature technology, mainly because there is no natural bidirectional semiconductors and the converter lacks in robustness. Complexity is an added drawback in this converter.

This thesis presents, firstly, an exhaustive study of the properties and the switching and modulation techniques of the MC. In a second stage, a variation on the Space Vector Modulation (SVM), the Double Sided Space Vector Modulation (DS SVM), is analyzed in detail. This modulation technique improves the harmonic spectrum of the currents and voltages of the MC, but, on the other side, it has extremely large computation requirements. On the other hand, a method for a simplified synthesis of the modulation algorithm is presented. Also, the interaction between DS SVM modulation and semisoft commutation in the drivers and auxiliary supplies for the semiconductors of the MC has been determined.

With the aim of finding a solution for high speed requirements of the MC, and taking into account that the MC behaves better with high switching frequencies, a new System on Chip (SoC) for the control of the MC has been developed. The new SoC has many embedded features such as control, modulation and some protection cores of the converter. All these cores (altogether 30 ) have been implemented in hardware in a single FPGA. By means of this architecture, the execution speed obtained is much faster than required by the DS SVM. This performance proves that FPGAs are an alternative to traditional DSP designs.

On the other hand, all necessary design criteria for a MC have been determined in an exhaustive way. These criterions have been used to build a 7.5 kW MC prototype. Moreover, the MC architecture has been improved by means of some hardware changes, which includes, mainly, a variation of the MC clamp circuit and a new start-up circuit. Taking these contributions into consideration, the critical start-up of the MC has been improved. Besides of this, a driver configuration has been presented which optimizes the switching times of the IGBTs in the MC. Lastly, a novel fault tolerant MC configuration is proposed. Thanks to this configuration, the MC can operate at full rating when there is a failure in any of its IGBTs.


Author:  Jon Andreu Larrañaga.
Advisor:  José Luis Martín.
Defence date:  December 2nd of 2008.
Qualification:  Outstanding cum laude.

Low latency Medium Access Control (MAC) protocol for wireless sensor networks. [+INFO]

Wireless sensor networks have arisen as the natural evolution of the great development that radio communication integrated circuits have achieved. This kind of networks are formed by several wireless and autonomous nodes that are able to sense their environment and work in an unattended fashion for long periods of time without human intervention. In order to achieve this performance, these nodes have to efficiently manage their power resources, both in sensors signal sampling and in data transmission. These networks offer a wireless way not only to capture the information but also to collect it wirelessly. This performance offers a synchronized picture of the value of each and every sensor in the network.

Many different medium access control protocols for wireless sensor networks have been published in the last few years. Although these approaches allow managing the medium access of all the nodes, none of the existing implementations at the moment of writing this thesis offered an integrated solution with ordered, reliable and power-aware data collection.

The purpose of this thesis is to propose and develop a brand new medium access control protocol for wireless sensor networks. The main aim of this protocol is to reduce the network’s data collection delay. This objective will be achieved by allocating different time slots to each node in the network. Additionally, some tests over real physical sensor networks have been performed in order to validate the theoretically obtained results.


Author:  Itziar Marín Saldaña.
Advisor:  Aitzol Zuloaga Izaguirre.
Defence date:  May 7th of 2008.
Qualification:  Outstanding cum laude.

Reliability and Neutral Point Voltage Control Improvement in Three-Level Neutral-Point-Clamped Converters. [+INFO]

The aim of the thesis is to answer one of the problems that still suffers the Three-Level Neutral-Point-Clamped Converter. This drawback is the decrease in the reliability of the converter due to the increase in the number of semiconductors that is necessary to use, which adversely affects the costs of maintenance and repair of the converter.

In order to minimize this problem, various solutions are posed aimed at increasing the reliability of the converter by analyzing in detail its principle of operation and their advantages and disadvantages.

Additionally, some of the topologies presented can improve the performance of the converter during normal operation periods in the absence of faults, allowing completely eliminate low-frequency oscillations in the neutral point voltage. This enables that the modulation strategy was focused on issues such as the improvement of the quality of voltage and current waves or the minimization of switching losses. In this sense, a modulation technique that minimizes the switching losses of some of the fault-tolerant topologies presented in the thesis is also introduced, achieving higher efficieny than the standard three-level Neutral-Point-Clamped converter under modulation SPWM (Sinusoidal Pulse Width Modulation) and optimum performance from the point of view of neutral point voltage.


Author:  Salvador Ceballos Recio.
Advisor:  José Luis Martín González and Josep Pou Félix.
Defence date:  March 11th of 2008.
Qualification:  Outstanding cum laude.

FPGA based binarization system for OCR in electronic voting applications [+INFO]

Many vision systems require text recognition of images captured at very high speed: car number identifiers, scanners, etc. Current technology allows the use of complex image preprocessing systems to improve their reading characteristics. This thesis proposes two new binarization algorithms suited to high precision character recognition applications.

The starting point is the study of the different existing voting systems and of their advantages and disadvantages. These different systems have been studied from the point of view of security, privacy and ease of use. The study of the different binarization systems and their usefulness in electronic voting applications has been a second step.

Once noticed that the existing systems do not completely solve the problem, two new algorithms have been developed and tested under the conditions imposed by the voting systems. Both new algorithms are based on the use of neural networks and modified histograms. One of the algorithms has been selected, based on the use of a semantic description of the histogram and a general regression neural network, since it is the best under the requirements imposed by the voting systems.

Finally, a physical implementation has been proposed using programmable logic devices. Using this physical implementation, the algorithm has been tested in terms of speed and complexity added to the voting system.


Author:  Jesús Lázaro Arrotegui.
Advisor:  José Luis Martín González.
Defence date:  July 7th of 2005.
Qualification:  Outstandig cum laude.

Dynamic Partial Reconfiguration of Multi-processor Modular Systems in SoPC devices. [+INFO]

Nowadays, the transistor density of electronic devices allows the integration of complete digital systems on a single integrated circuit. In order to reduce the development time and to face successfully these type of designs, they are made usually using cores. These cores, due to their complexity, often include processors inside. So, in these cases, they are called multi-processor systems.

This level of integration has also been spread to FPGA reconfigurable devices, which have been widely used because of their flexibility. In spite of that, the most common use of the reconfiguration capability is limited to the development stage of the design, to facilitate the debug process and, in some cases, to perform latter upgrades of the digital system.

However, the latest FPGAs allow to modify part of their configuration while the rest of the configured circuit remains running. This ability, called dynamic partial reconfiguration, has an additional interest in the designs that integrate digital systems on a single device. For these situations, the computations made into the chip can also set what context changes must be performed to the modules and apply them. These are the so called auto-reconfigurable systems.

Auto-reconfiguration is a complex operation. To perform it safely in a multi-processor core based system, the FPGA must both technologically admit the reconfiguration and contain a control system to manage the whole process.

This thesis proposes an auto-reconfiguration control system for multi-processor core based systems. First, a general proposal for the control system is presented. It is valid to be integrated into systems that use the most common standard specifications for System-on-a-Chip design. This generalization is described based on s generic multi-processor reconfigurable model, that is used to define the specifications of the different elements that build the control infrastructure. To help the designer to study the viability of the auto-reconfiguration in a design, the infrastructure area and time cost have been modeled and parameterized.

The proposed theoretic system is validated using a specific reconfigurable technology. For this purpose, all the elements specified in the control infrastructure are implemented, and some additional tools are developed to manage multi-processor and multi-context designs. The implemented infrastructure has been applied to three platforms that have been designed to experiment the auto-reconfiguration with the proposed approach. A custom prototype, that admits an exhaustive control of the FPGA configuration sequence, has been built to perform these experiments.


Author:  Armando Astarloa Cuellar.
Director:  Aitzol Zuloaga Izaguirre.
Defense date:  July 5th of 2005.
Qualification:  Outstanding Cum Laude.

Location System for Wireless Sensor Networks [+INFO]

In the last years, a great amount of radio integrated circuits have appeared in the market. The availability of this kind of components has enabled the apparition of a new sort of applications: wireless sensor networks. In these systems, sensors are not located in the very same circuit, but they work as isolated complete autonomous systems. Thus, they can monitor and control physical magnitudes, which are distributed in a large geographical area. However, in order to keep these systems economically feasible, the price of each node (both in for its design and its production) must be kept to a minimum. The most important advantage of these systems is redundancy: if a large amount of sensors take part in the network, the absence of a particular node (e.g. due to some hardware failure) does not have a great impact in the overall performance, because a new node will take charge of its duties, until the problem is solved.

Nevertheless, the cooperation among such a huge amount of nodes is not a simple task: as all sensors in the network must have the same hardware and software and they are all limited in terms of energy consumption and computing power, the protocols used in this kind of networks must be carefully designed for the strong characteristics of this environment. In this case, the cooperation tasks may be simplified greatly if the location of each node and the overall network topology are known. The large amount of nodes makes the manual specification of the position impossible, requiring an automatically location system discovering algorithm, so that each node can calculate its own position.

In this thesis a new algorithm for finding a node's position is proposed and developed. In order to calculate this location, the distances between the node and some beacons are used. Since low cost nodes are used, the quality of these measurements is supposed not to be very high and, therefore, errors will appear. The algorithm described here tries to find the best position for the node, even in the presence of errors in the measurements.

Last, in order to examine the results of this algorithm, a simulation platform has been designed. By using this platform, the algorithm proposed in this thesis has been compared with other algorithms used in the recent years, to analyze what kind of computational load it imposes to the node and how it behaves in the presence of measurement errors. In addition, the algorithm has been implemented in a real node, showing that it is perfectly feasible in the environment, for which it has been designed.


Author:  Jagoba Arias Pérez.
Advisor:  Aitzol Zuloaga Izaguirre.
Defense date:  July 1st of 2005.
Qualification:  Outstanding cum laude.

Contributions to the design and test of complex digital circuits for train communication [+INFO]

The design of complex digital circuits, including a microprocessor, some peripherals and specific hardware, cannot be addressed by simply using powerful software tools. Neither traditional techniques nor intensive development times are enough. Only new strategies, focused more on the methodology than on resources, can take advantage from technologies that offer more than 100,000 logic gates per square millimeter. Among them: abstraction or top-down design, architecture exploration, predefined core integration, design based on platforms and hardware-software codesign. However, within the creation process of a complex system, the verification requires a special effort. As a matter of fact, it consumes most of the software and human resources; thus turning into the major challenge.

In the railway field, the electronics is becoming more and more relevant, compared with the mechanics. Nevertheless, suppliers, variety of products and scientific literature about railway electronic systems are scarce. The TCN (Train Communication Network) standard completely specifies all the levels in a local area network to interconnect both the devices inside a coach and the different carriages. This has been the European answer in telecommunications to railway manufacturers and operators.

In this thesis, some new electronic creation and verification techniques have been applied in order to design TCN devices. In fact, the master node architecture of the Multifunction Vehicle Bus (MVB) has been described following a codesign methodology, including some innovations. The ‘progressive device family’ concept has been crucial to determine which modules constitute the functional design. Subsequently, this architecture has been coded in the SystemC language. In this way, every block may be implemented either in hardware or in software. Finally, the Lee, Hsiung and Chen’s algorithm has guided the hardware-software partitioning.

In addition, a specific testbench to verify MVB devices has been created. On the basis of a commercial tool, it allows to perform effective simulations, configured by means of the user interface. Circuits under test and part of the environment must be described in VHDL. Nevertheless, the most complex tasks in the testbench have been programmed in C.


Author:  Jaime Jiménez Verde.
Advisor:  José Luis Martín González.
Defence date:  June 22nd of 2005.
Qualification:  Outstanding Cum Laude.

Core-based Architecture to Data Transfer Control in SoC [+INFO]

Several electronic circuits require controlling high-bandwidth data exchange at very high speed: industrial machinery like filling or milling machines, PC peripherals like printers, plotters or recorders, audiovisual equipment, mobile telephones, etc. Today's technology supports the integration on a single chip (SoC, System-on-Chip) of most of the capabilities needed by these complex systems. This Thesis proposes a flexible and scalable architecture for data transfer control in core-based SoC design.

The start point is the specification of a SoC model that is valid for a wide range of applications. The definition and the design of such a generic system have been accomplished on the base of the integration of a set of cores by means of a standard interconnection architecture. The selected topology uses a controller and a bus specifically dedicated to high speed data transfers.

Besides, a simulation platform valid for any application designed by reusing the generic architecture has been developed. This environment allows to verify the functionality of the whole system and to analyze the reliance of system features like bitrate and latency on parameters like the number of simultaneous data transfers, the type of data units, and the type of access to a SDRAM memory. A survey that is very useful to precisely estimate the performance of future applications is also presented.

Finally, all the circuits have been implemented on two FPGAs from two different suppliers in order to achieve these three objectives: to validate the behaviour in real electronic cards, to analyze the dependence of hardware descriptions (performed in VHDL at register transfer level -RTL-) on the technology, and to compare the area and speed results of the different implementations.


Author:  Unai Bidarte Peraita.
Advisor:  José Luis Martín González.
Defence date:  June 23rd of 2004.
Qualification:  Outstanding Cum Laude.

Implementation of processing models for optical flow determination from image sequences using VHDL [+INFO]

In this Thesis an architecture to determine the optical flow from image sequences in real-time has been proposed. This architecture will be developed using basically programmable logic devices, specifically FPGAs. By that reason the architecture will be developed using a hardware description language, concretely the VHDL.

The optical flow is an important component in the development of vision systems related with the motion analysis. The applications of the optical flow are diverse, going from the dynamic characterization of objects in images to the determination of the three-dimensional characteristics of environment, passing through the reconstruction and improvement of images.

Most important constrains imposed to the system was the real time processing and a suitable image resolution, similar to the obtained from an standard television camera.

For the development of this Thesis it was necessary to create a set of tools that allow to work with image processing systems developed with VHDL. In addition a methodology to develop a system hardware from a mathematical model has been presented, like the used to obtain the optical flow.


Author:  Aitzol Zuloaga Izaguirre.
Advisor:  José Luis Martín González.
Defence date:  December 11th of 2001.
Qualification:  Outstanding Cum Laude.