|
|
 |
|
|
|
|
-
System
and method for reading and writing a digital
memory. J. A. Araujo, J. Lázaro, A.
Astarloa, A. Zuloaga. Patent
number 2549188. Published in
B.O.P.I.
in October 23rd of
2015. [+INFO]
The present invention relates
to the field of digital electronics
technology, and more particularly to
management of a digital memory. It uses at
least one segmented digital memory in which,
given the need to locate an input from a
plurality of data stored in the memory, all
segments of the digital memory are analyzed
in parallel. In turn, each of the mentioned
segments is read sequentially. Each segment
has one or more output ports, each output
port is connected to one or more
comparators. A significant increase in
search speed is thus achieved also
supporting multiple concurrent searches.
-
Voting
system. J. Lázaro, A. Astarloa, U. Bidarte,
A. Zuloaga. Patent number 2379239.
Published
in B.O.P.I.
in April 24th of 2011.
[+INFO]
The present invention applies
to the field of redundancy systems for
correcting errors in digital circuits, and
more specifically, to systems used in such
voters. The voting circuit provides fast and
reliable results since it is based on an
arithmetic adder. The invention has 2n-1
input logic signals, n being an integer. The
resulting output is at least one logic
output indicating the value of the most
repeated logic input signal. In order to do
so an n bit adder is used. The adder’s
inputs are the inputs to the logical system.
In this way, the adder’s n output will
provide the result of the voting process.
-
System
for Eliminating Current Surges in
Electronics Systems and Equipment having
intermittent current consumption. J. M. de
Diego, J. I. Garate. Patent number 2372084 /
WO2011/110718. ublished in B.O.P.I. in
November 21th of 2011. [+INFO]
The objective of this
invention is define a DC-DC power supply
system that provides a constant voltage at
the load, independently of the load current
consumption, and has a constant input
current and voltage. To achieve this
objective a DC-DC converter with a power
control adaptive loop is employed.
-
Resonant
converter with high frequency transformer
for direct current power transmission. I.
Martínez de Alegría, S. Ceballos, P. Ibañez,
J. L. Martín, I. Gabiola, J. Andreu, I.
Kortabarria. Patent number WO2011/135108.
Published in W.I.P.O. in November 3rd of
2011. [+INFO]
The object of the patent is a
bidirectional DC-AC power converter, a high
frequency high voltage transformer and a
direct current power line feeding the
system. The converter operates in resonant
mode and the goal is the connection of wind
turbines to HVDC transmission lines.
-
Matrix
Converter. J. Andreu, J. L. Martín, I.
Kortabarria, E. Ibarra, U. Bidarte, I.
Martínez de Alegría, P. Ibañez. Patent number 234169315.
Published in B.O.P.I. in June 24th of 2010.
[+INFO]
The present invention relates
to a matrix converter comprising at least
two phases of entry and at least two output
phases, typically three in both cases, and a
bidirectional switch number equal to the
product of the number of input phases by the
number of output phases, each input phase
being connected with each output phase by
means of one of these bidirectional
switches. The matrix converter further
comprises at least one redundant
bidirectional switch, which is connected to,
at least, one input phase and, at least, to
one output phase. These input and output
connections include the elements to allow
the parallel connection of the bidirectional
redundant switch to a damaged bidirectional
switch of the original matrix converter. In
order to make this connection it is not
necessary to tun of the power converter.
-
True
Random Number Generator. U. Bidarte,
A. Astarloa, J. Lázaro, A. Zuloaga. Patent number
2326718. Published in B.O.P.I. in October
16th of 2009. [+INFO]
This invention produces a
continuously random signal synchronized with
a high frequency square signal from an
external oscillator. The random number
sequence is of high entropy, that is to say,
the correlation between bits close in time
is nearly null. One Digital Phase Alignment
Circuit (DPAC) generates the primary clock
in phase with the oscillator. A specific
control unit controls the phase delay in the
output signal of a second DPAC in order to
achieve a setup or hold timing violation in
a flip-flop. The output of the flip-flop is
unknown and the two logic states equally
possible. It works in a metastable state.
-
Controller
and control method for the active and
reactive power of Doubly Fed Asynchronous
Machine. I. Martínez de Alegría, J.
Andreu, J. L. Martín, J. L. Villate, I.
Gabiola. Patent
number 2270675. Published in B.O.P.I. in
April 1st of 2007. [+INFO]
The object of the invention
allows the control of the active and
reactive power of the doubly fed
asynchronous machine without the need to use
physical parameters of the machine and
without measurement of the rotor currents.
This method does not require tuning of PID
gains, hysteresis bands or any other control
parameters and its set-up is extremely easy.
|
|
|
|
|
|
OUR PARTNERS:
|
|
